EDN

Xilinx Announces ISE Design Suite 13.4 Further Extending 7 Series FPGA Support and Design Productivity

MicroBlaze MCS, new to the Xilinx® LogiCORE™ IP core offering, provides a turnkey microcontroller solution to Xilinx customers. It includes the MicroBlaze processor, local memory for program and data ...
Design-Reuse

Xilinx ISE Design Suite 12 Enables Up to 30% Dynamic Power Reduction with Intelligent Clock-Gating Technology

AMBA 4 AXI4 IP Support and Innovations in Design Preservation Combined with ISE Power Optimization to Deliver New Levels of Productivity for Virtex-6 and Spartan-6 FPGAs SAN JOSE, Calif., May 3, 2010- ...
EDN

Xilinx shipping ISE Design Suite 11.1

SAN FRANCISCO—Programmable logic vendor Xilinx Inc. is now shipping ISE Design Suite 11.1, described as the first FPGA design tool set with interoperable domain-specific design flows and tool ...
Electronic Design

FPGA Design Tool Brings More Modularity To FPGA Design

Xilinx's latest incarnation of its Integrated Synthesis Environment, ISE Design Suite 12, now brings features such as ‘intelligent’ clock-gating technology to its line of FPGAs as well as a new ...
Electronics Weekly

Xilinx reshapes design tools to widen FPGA use

Xilinx believes now is the time to widen the use of FPGAs and the latest version of its design tool suite is intended to be practical for specialist and non-specialists alike. The company has ...
CIOL

Xilinx ISE 9.2i reduces memory requirements, supports new OSs

SAN JOSE, CALIF: Xilinx Inc. recently announced the immediate availability of the ISE 9.2i (Integrated Software Environment) design tools, the latest release of its widely-used design solution.
CIOL

Xilinx delivers 8.2i ISE tool suite

widely-used design solution, now supporting the company's 65nm Virtex-5 domain-optimized FPGAs. Leveraging the features of the Virtex-5 ExpressFabric technology, the ISE 8.2i design environment ...
Electronics Weekly

Clock gating is key to improved design flow, says Xilinx

Intelligent clock gating is key to Xilinx’s bid to reduce dynamic block-RAM (BRAM) power consumption in its Virtex-6 FPGA designs. The key to this fourth generation partial reconfiguration design flow ...
Electronic Design

Synthesis Support Rolls For Xilinx Virtex-5 FPGAs

Two major EDA vendors—Magma Design Automation and Mentor Graphics—have both announced synthesis support for Xilinx’s new Virtex-5 family of FPGAs. Two major EDA vendors—Magma Design Automation and ...
Design-Reuse

Xilinx Announces ISE Design Suite 13.4 Further Extending 7 Series FPGA Support and Design Productivity

Latest release includes the New MicroBlaze Micro Controller System, Enhanced Debug with 2D Eye Scan and Partial Reconfiguration Support for Artix-7 and Virtex-7 XT FPGAs SAN JOSE, Calif. -- Jan. 18, ...